DirectFET®; MOSFET: Stencil PCB Design

Stencil Design
  • DirectFET MOSFETs have been designed to work with stencil thickness from 6mils (150µm) to 10mils (250µm)
  • Most customers are using 6mil stencils
  • Stencil design plays a significant role in creating the ideal solder joint
  • Volume of solder is the critical parameter
  • With the stencil thickness set for the whole board, solder volume for each individual device type is controlled by the amount of aperture reduction vs the board pad area
"Play Audio

  • Stencil design may often be reduced. The reduction can depend on stencil thickness and solder paste type

  • The stencil does not have to match the pad outlines symmetrically and in some cases advantages can be obtained it does not


Stencil Design - Aperture Reduction
  • From experience we know that a 25% area reduction gives good results with a 6mils (150µm) thick stencil and most paste types.
  • The reduction is calculated against the area of the PCB outline
  • To translate this reduction for other stencil thicknesses it is necessary to calculate the volume printed
  • Print area x stencil thickness = volume of paste
  • For our standard 6mil stencil: 1.700 x 0.850 x 0.150 = 0.217mm3 (25% reduction by area)
  • Equivalent volume for a 5mil stencil :1.750 x 1.000 x 0.125 = 0.219mm3 (10% reduction by area)


ST Small Can Stencil Design
ST-outline stencil design
All Dimensions = ±0.020mm
ST Substrate Layout


SH Small Can Stencil Design
SH-outline stencil design
All Dimensions = ±0.020mm
SH Substrate Layout


SQ Small Can Stencil Design
SQ-outline stencil design
All Dimensions = ±0.020mm
SQ Substrate Layout


SJ Small Can Stencil Design
SJ-outline stencil design
All Dimensions = ±0.020mm
SJ Substrate Layout


MX Medium Can Stencil Design
MX-outline stencil design
All Dimensions = ±0.020mm
MX Substrate Layout


MT Medium Can Stencil Design
MT-outline stencil design
All Dimensions = ±0.020mm
MT Substrate Layout


MN Medium Can Stencil Design
MN-outline stencil design
All Dimensions = ±0.020mm
MN Substrate Layout


MP Medium Can Stencil Design
MP-outline stencil design
All Dimensions = ±0.020mm
MP Substrate Layout


MQ Medium Can Stencil Design
MQ-outline stencil design
All Dimensions = ±0.020mm
MQ Substrate Layout


MZ Medium Can Stencil Design
MZ-outline stencil design
All Dimensions = ±0.020mm
MZ Substrate Layout


IR’s proprietary DirectFET®; technology is covered by US Patent 6,624,522 and other US and foreign pending patent applications.