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DirectFET® MOSFET Soldering Considerations: Voiding


The above images show approximately 20% voiding.

Whilst we say that >20% voiding is undesirable, we have tested DirectFET with up to 30% voiding in our Qualification testing:

  • X-ray’d 3x 80pc qual lots that had completed 1000 temp cycles
  • Checked datalogs before and after 1000 cycles and compared high and low voiding parts
  • Calculated the current densities that would be seen for up to 30% voiding
NO PROBLEMS OR ANOMOLIES FOUND ON ALL SAMPLES, THIS REFLECTED UP TO 30% VOIDING LEVELS

Note: JEDEC spec on voiding = 25%

Problem Observations Causes Recommendations
Voiding (>15%)

Voids are measure as a percentage of the pad area. Even though DirectFET will be unaffected by voids up to 40% area customers will generally not accept over 20%.

18% voiding

X-ray images show voiding levels between 10and 40% Reflow profile, reflow profile is often the cause. Check reflow profile, check whether large contact components also show voiding. Adjust profile if required (see appendix)
Board finishes, some require more energy than others and can effect voiding. See above
Poor reflow equipment. Multi-zone ovens with nitrogen will give better results than small ones with just air. Generally, with profile work the level of voiding can be bought down to low level voiding.Some of the population may exhibit voiding up to 20%.
Solder paste Some types of solder paste (even different ones from the same manufacturer) can give very different results. Using the same profile and settings
Board or component oxidation or contamination. Check that the component and boards are not obviously corroded and that the storage precautions have been adhered to. Look for other components affected
Voiding (low level)

Voids are measured as a percentage of the pad area. Even though DirectFET will be unaffected by voids up to 40% area customers will generally not accept over 20%.

low level voiding

X-ray images show low level voiding Insufficient solder to make joint well. Accompanied by some joints that are poorly formed or have feathered edges. Check stencil design if reduction exceeds 30% the reduction needs to be considered.
Reflow profile still not optimum. It gets very difficult to totally remove voiding. All factors referenced in the voiding section need to be considered. Do not get drawn in to trying to fix low level voiding if it is not directly related to an issue of ours.
Board finishes, can significantly affect low level voiding. There is nothing that can be done by us to remedy this
It is unlikely that ovens running air will get near to the performance of ovens using nitrogen. Do not expect to obtain the same results on different ovens.
Solder paste Some types of solder paste (even different ones from the same manufacturer) can give very different results. Using the same profile and settings.

 
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   Checking Pad Outlines
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   Reflowing
    Soldering Considerations
      Device Tilt & Tombstoning
      Solderballing
      Voiding
    X-ray Inspection
   Solder Paste
    Cleaning the DirectFET
   Device On-Board Placement
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