| Problem |
Observations |
Causes |
Recommendations |
| Solder balling!
Solder balls around the perimeter of the die are not in themselves problematic.
However, they are undesirable and many customers will want to reduce their
occurrence.
 |
X-ray images or visual inspection along the die edge show solder balls along the perimeter of the die. |
Too much solder. |
Check reduction on stencil, for a 0.150mm (0.006”) stencil thickness 25% global reduction
is required (see appendix). |
| Some solder pastes are more prone to slump and solder balling |
In these cases it may be necessary to go for greater reduction on the gate and source pads
of the device. Gross solder balling as seen in image may require 10-15% reduction(see appendix) |
| X-ray images show randomly scattered solder balls, some may be very small. |
Too fast ramp time on reflow or insufficient soak time. |
Check that reflow profile meets manufacturers specification. Adjust reflow accordingly. |
| Boards may be damp. |
Check storage conditions and whether other components on the board are showing similar issues. |
| Device not flat post reflow!
Up to 3° of tilt can be tolerated across the device (see picture, this shows device at 3° & is repeated in appendix ).
Tilt should not be easily detectable in other axis <1°. |
Devices tilted across width, often in the same direction. |
Devices tilted post placement. |
See recommendations for placement. |
| Some or many of the devices tilted across width. Often solder balling or extended joints can be seen on x-ray. |
Too much solder paste! Generally tilt is affected by too much solder under drain rails (not visible) |
Check reduction on stencil, for a 0.150mm (0.006”) stencil thickness 25% global reduction is required (see appendix).
Extended drain pads can also help (see appendix) |
 |
Devices that are tilted are always very close to a large component (e.g.inductor) |
Thermal gradient across board in location of DirectFET |
Higher reflow energy should show improvement. Also check stencil reduction etc (as above) |
| Devices tilted lengthways. One end of the device typically sits higher than the other. Device has one end very close to a large component or has one end mounted to a fine track and the other on a large copper area.
May result in electrical failures. |
Thermal gradient across DirectFET, end to end.
This can cause an effect known as “tombstoning” in other components. It is where the solder at one end of the device reflows at a different rate and time from the other (see appendix for more information) |
Increasing energy available during reflow by altering the reflow profile will show improvements. Extending the drain pads can also help (see appendix for more information on cause and effect) |
