| Problem |
Observations |
Causes |
Recommendations |
| Solder balling
Solder balls around the perimeter of the die are not in themselves problematic.
However, they are undesirable and many customers will want to reduce their
occurrence.
 |
X-ray images or visual inspection along the die edge show solder balls along the perimeter of the die. |
Too much solder. |
Check reduction on stencil, for a 0.150mm (0.006”) stencil thickness 25% global reduction
is required (see appendix). |
| Some solder pastes are more prone to slump and solder balling |
In these cases it may be necessary to go for greater reduction on the gate and source pads
of the device. Gross solder balling as seen in image may require 10-15% reduction(see appendix) |
| X-ray images show randomly scattered solder balls, some may be very small. |
Too fast ramp time on reflow or insufficient soak time. |
Check that reflow profile meets manufacturers specification. Adjust reflow accordingly. |
| Boards may be damp. |
Check storage conditions and whether other components on the board are showing similar issues. |
Poorly formed gate and source connections (small and incomplete) |
X-ray images show incomplete or missing joints one one or more of the die connections. |
Insufficient solder to make joint well.
Thin stencils (0.100mm) are more prone to this. High reductions may also cause this problem. |
Check stencil design, recommend changes based on data in appendix. Stencil thickness may need to be increased is this is a persistent problem. |
| Reflow profile not optimum or poor reflow equipment. Deficiencies in reflow may also cause this type of problem. |
If sufficient solder is available, check reflow profile meets specifications, see if other components are showing signs of poor soldering. |
| Poor device flatness on board. |
See device flatness information. |
| Solder paste |
Very low activity solder pastes may struggle to wet the joints correctly. See if other components are affected. |
| Poorly formed gate and source connections (extended or shorting pads)
 |
X-ray images show additional areas outside of the normal joint area, contacts may be bridged or joining.
Some electrical failures for shorted connections. |
Too much solder |
Check reduction on stencil, for a 0.150mm (0.006”) stencil thickness 25% global reduction is required (see appendix). |
| Poor substrate layout. Substrate layout does not meet recommendations, solder pads are too big or in the wrong place. |
Check gerber files and or measure substrate using measure-scope. Check results against application note. |
| Poor substrate layout resulting in poorly defined or deformed pads. Via too close, solder mask opening too close to edge of track. |
Visually check a number of boards using a microscope check for faulty pads. Make recommendations based on findings. |
| Pad definition is not correct. Poorly defined pads. Pads should be either solder-mask defined (SMD) or non solder mask defined (NSMD), not both. |
Check quality of board layout, check pads are to recommended sizes (see appendix for examples) |
| Drain pad not soldered
One or more of the drain pads have not been soldered.
 |
Drain pads have not all been soldered.
Devices tilted lengthways. One end of the device typically sits higher than the other. Device has one end very close to a large component or has one end mounted to a fine track and the other on a large copper area (e.g. inductor).
Shorting and or poor registration of device may also be seen.
In the picture it is easy to believe that the solder paste was never present on this pad, it was and it was wicked cleanly off by the DirectFET. |
Thermal gradient across DirectFET, end to end.
This can cause an effect known as “tombstoning” in other components. It is where the solder at one end of the device reflows at a different rate and time from the other (see appendix for more information) |
Increasing energy available during reflow by altering the reflow profile will show improvements.
Moving the device away from large components or copper areas.
Extending the drain pads can also help (see appendix for more information on cause and effect) |
| Substrate finish can also promote this. Some finishes require higher energy than others to complete a good solder joint. |
Changing board finish to one that requires less energy to solder will show the same improvements as increasing the energy. |