Mechanical Engineer

Substrate Bend Testing
  • Curve tracer was used to monitor the gate, looking for: gate leakage, open or short circuit
  • For the capacitors a capacitance meter was used to look for +/-20% shift in capacitance
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Vibration Testing


  • Tests carried out in accordance with BS 2011:Part 2.1Fd “Random Vibration – wide band general requirements” specifications.
  • 3hrs testing showed 0/16 fails at each attitude
 
Drop/Shock Testing




Compression Testing



Tests & Reliability
Completed and Qualified to Spec
  • Solder standoff trials
  • Screen aperture design
  • Placement force
  • Solder vendors
  • Substrate bend strength measurements
  • Package parasitics
  • Shock/drop testing
  • Vibration testing
  • Temperature/power cycling on IMS
  • Temperature/power cycling on ceramic
  • Temperature/power cycling on Pb-free solder
  • High frequency parasitic evaluation
  • HTRB, HTGB, THB
  • Moisture absorption
DirectFET MOSFET Outlines
The new method of outline identification breaks all devices up into 3 die sizes within each can.



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IR’s proprietary DirectFET®; technology is covered by US Patent 6,624,522 and other US and foreign pending patent applications.