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DirectFET®; MOSFET Impedance Modeling and Testing

DirectFET Theoretical Model Under DC Conditions

Assumptions:

  • Breakdown DirectFET into rectangular plates
  • Rdc = ρL/(w X h)
    Where:
    ρ=resistivity
    L=length
    w X h=area of the cross-section of the conductor
  • Single ended drain connection

Package AC Impedance testing


  • Test cards placed as close as possible to LCR O/P to limit stray pick up
  • No moveable wires/Kelvin wires required to limit variation in short and open circuit measurements
  • Separate DUT and short circuit cards for each package…
Test Card Design: DirectFET®; MOSFET Example

Gate, source and drain sense contacts on underside of board


Open circuit measurement card

Short circuit card

Device under test (DUT) card

D2Pak
4x15 mil
Al wires
D-Pak
2 x 8 mil
Al wires
SO-8
14 x 2 mil
Au wires
MLP
16 x 2 mil
Au wires
DirectFET
Cu ‘dummy’ die
3.3 x 2.0 mm
= location of Kelvin voltage sense connections

  • Voltage sense vias as close to device as possible
  • Drain and source sense vias as close together as possible
  • Fabricate short, open and test cards for each device under test

Effect of packaging parasitics upon 2-phase 1U VRM circuit efficiency

  • Lower package parasitics and and improved cooling results in 4% increase in converter efficiency at 2MHz
"Play Audio
Switching Waveforms in 2-Phase 1U VRM
DirectFET Waveform

SO-8 Waveform

  • 30A VRM output current 500 KHz per phase
  • Silicon of the near identical active area, voltage and generation used in both packages
  • Inductance related ringing greater in case of SO-8

"Play Audio

IR’s proprietary DirectFET®; technology is covered by US Patent 6,624,522 and other US and foreign pending patent applications.

 
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High Frequency Performance
Board Mount Guidelines
Engineering
Heatsinking
Lab Scale Mounting
Mechanical Test Data
Thermal Calculations

Package Impedance vs. Frequency
Impedance Modeling and Testing
EMC Considerations
High Frequency Application Example
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