INTERNATIONAL RECTIFIER - THE POWER MANAGEMENT LEADER

DirectFET®; MOSFET Technology: General Information

DirectFET technology uses a new interconnect methodology facilitated by a proprietary passivation system:
  • Large area Source and gate contacts are directly soldered onto the PCB board
  • Copper drain clip facilitates the drain connection and also improves transfer of heat from the top of the device.


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How can this new technology be used?
In any system where the printed circuit board (card) is getting too hot:
  • DirectFET MOSFETs allow the heat to be removed away from the PCB rather than dumping all the heat into the board.
  • We call this double sided cooling:
    • DirectFET MOSFETs are the first surface mount packages designed from the beginning as a power package NOT an IC package.
    • With DirectFET MOSFETs + heat sink we are still discovering the current carrying limits
  • Contrast this to all the other packages:
    • Power-pack: Reduces DFPR below Cu strap and lowers thermal inpedance to PCB - and eliminates lead flexibility of earlier packages
    • LF-pack: Reduces DFPR below Cu strap and lowers thermal inpedance to PCB
    • BGA: converted IC package modified for power, tight spacing of balls limits use in power circuits
    • Cu-strap SO-8 reduces DFPR (Die Free Package Resistance) and makes slight improvement in thermal impedance but can only increase current by 10% to 20%
    • SO-8 - poor thermal, industry base line


DirectFET Package in Summary


Enables Double Sided Cooling


Increases the power dissipated out of the package by removing the heat very efficiently through the top of the package.
Improves Conduction Performance in SMT Package


Reduces die-free package resistance by over 90% - over SO-8.
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Lead Free Compliance
DirectFET MOSFETs are completely RoHs compliant:
  • Some DirectFET MOSFETs have completed testing to MSL level 3 with a 260°C reflow temperature
  • Extensive thermal cycling testing has been carried out with Pb-free solder and in the majority of cases the thermal cycling performance is improved.
  • Complete lead-free qualification test is in process

DirectFET MOSFETs for Higher Power Density

Adding a heat sink increases current density by 20 to 50%

Tests and Reliability
Completed and Qualified to Spec
  • Solder standoff trials
  • Screen aperture design
  • Placement force
  • Solder vendors
  • Substrate bend strength measurements
  • Package parasitics
  • Shock/drop testing
  • Vibration testing
  • Temperature/power cycling on IMS
  • Temperature/power cycling on ceramic
  • Temperature/power cycling on Pb-free solder
  • High frequency parasitic evaluation
  • HTRB, HTGB, THB
  • Moisture absorption
Reduced Ringing At High Frequencies due to low package Inductance

Footprint area reduction

Replace four SO-8 devices with two DirectFET MOSFETs

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IR’s proprietary DirectFET®; technology is covered by US Patent 6,624,522 and other US and foreign pending patent applications.

 
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Introduction to DirectFET Technology
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