Known Good Die - The SureCHIP™ Process

International Rectifier’s SureCHIP Program is a process regimen that combines high-volume manufacturing and assembly with precision parametric testing and special packaging to deliver Known Good Die (KGD) power semiconductors. The KGD process provides measurably higher yields and is an economically viable solution in the manufacturing of multi-chip modules (MCMs). As part of the SureCHIP process, individual good die from probed and sawn wafers are transferred to a custom-designed test nest for 100% electrical and visual testing.

SureCHIP power semiconductor die are packaged into tape and reel in a nitrogen atmosphere or into chip trays for shipment. The SureCHIP KGD process is qualified for 100% DC parametric testing. Additionally, avalanche testing on MOSFETs and short circuit testing on IGBTs can be performed.

Sample Avalanche Test Results

 

THE IR ADVANTAGE
KGD testing equal to package part testing
100% Avalanche capability for more than 75A
Singulated testing, eliminating lateral current paths
Accurate testing for RDS(on)
Voltage ratings up to 1200V
Leakage current testing down to nA range
Pogo pins provide accurate voltage and resistance readings
Hybrid modifications enable cleaner noise environment
Each die is warranted to be electrically good
KGD Package Options
T&R Option

T&R dimensions are according to die size.

 
Chip Pack Option

Tray packaging option can be either 4"x4" or 2"x2" (outside dimensions).

Comparison of Wafer Level Testing of RDS(on) vs. IR's KGD Solution

1. Multiple contacts between backside of wafer and chuck tester
2. Die to Die interference cannot be isolated
3. RDS(on) accurate down to 20mOhms
4. IDRAIN measurements constrained to less than 10A
5. Parallel testing resulting in multiple signal paths that can effect results
6. Key measurements impacted by Kelvin contacts over entire backside of wafer
7. High risk for final application due to dicing operation

  
1. Pogo pins provide uniform contact
2. Direct contact with isolated Die
3. RDS(on) accurate down to 2.5mOhms
4. I DRAIN Measurements possible to greater than 75A
5. Singulated testing, eliminating lateral current paths
6. Hybrid modifications enable cleaner noise environment
7. Kelvin contact fixed to single location for single die
8. Singulated die usually pre-screened for mechanical
defects


Individual Die from probed and sawn wafer are transferred to a custom designed test nest for electrical testing

 
SureCHIP is packaged in tape after passing 100% electrical testing and visual inspection 		 
Die is fully tested in the proprietary test nest with the true Kelvin connections to enable measurements at high current