Term |
Definition |
AC Test | General term used to describe tests that measure dynamic or switching parameters |
AOI | Automated Optical Inspection |
Ag | Silver |
Al | Aluminium |
ASIC | Application Specific Integrated Circuit. Semiconductor circuit specifically designed to suit a customer's particular requirement |
Au | Gold |
Bare Die | Unpackaged die, e.g integrated circuits, diodes and transistors |
Bonding | The process of connecting wires from the package leads to the chip or bonding pads |
Bond Pads | An area on the periphery of a silicon die for making connection to one of the package pins |
Bumped Die | Unpackaged integrated circuit that has interconnect material formed in contact with the I/O to allow flip-chip attachment |
Chip | Also called a die. Popular term describing a section of a wafer that contains a discrete component |
Class B | A screening process for circuits that are intended for use in ground-based military electronic systems |
Class S | A screening process for circuits that are intended for use in satellite systems for military space applications |
COB | (Chip on Board) A bare die that is attached to a rigid substrate face up and electrically interconnected to the substrate using wire bond technology |
COF | (Chip on Flex) A bare die that is attached to a flexible laminate substrate active side up and electrically interconnected to the substrate using wire bond technology |
COG | Chip on Glass |
CSP | Chip Scale Package |
CTE | Coefficient of Thermal Expansion |
C4 | Controlled-Collapsed Chip Connection |
DCA | Direct Chip Attachment |
DC | Test General term used to describe tests that measure static parameters |
DSCC | Defence Supply Center, Columbus. The agency responsible for procurement of electronic supplies for the U.S. military |
DPC | Die Product Consortia |
EE | Element Evaluation |
EMI | Electromagnetic Interference |
ESD | Electrostatic Discharge |
Eutectic Solder | 63% Tin, 37% Lead |
FA | Failure Analysis |
Fab / Fabrication | In semiconductor manufacturing, fabrication usually refers to the front-end process of making devices and integrated circuits in semiconductor wafer |
FCP | Few Chip Package |
Film Frame | Sawn wafer on sticky tape supported by a metal frame |
Flip Chip | A method for electrically interconnecting unpackaged die active side down with a conductive bump to the substrate |
Gel Package | Plastic trays used to shop unpackaged die. The die is held in place by surface tension of a membrane. A vacuum chuck is required to reduce surface tension and remove die |
HDI | High Density Interconnects |
I/O | Input/Output |
IC | Integrated Circuit |
JEDEC | Joint Electronic Device Engineering Council |
KGD | Known Good Die |
LAT | Lot Acceptance Test (also known as an element evaluation) |
LTCC | Low-Temperature Co-fired Ceramic |
MCM | Multi-Chip Module |
MCP | Multi-Chip Package |
MIL-PRF-38534 | Specifications that establish general quality and reliability assurance requirements for hybrids. |
MIL-PRF-38535 | Specifications that establish general quality and reliability assurance requirements for microcircuits. |
MIL-STD-883 | Test methods and procedures for microelectronic devices for use in military and aerospace systems. |
mv | Microvis technology creates a PC board via of <= 150mm (typically by non-mechanical means) and uses built-up multi-layer processes. |
mBGA | Microg Ball Grid Array package |
mSMD | Micro Surface Mount Device |
Pb | Lead |
PWB | Printed Wiring Board |
RF | Radio Frequency |
SCD | Source Control Drawing |
SEM | Scanning Electron Micrograph - high resolution photography that uses electrons rather than light waves to define an image |
SiP | System in a Package |
S Level | Wafer fabrication process and quality requirements as defined in MIL-PRF-38535 |
SMD | Standard Microcircuit Drawing |
Sn | Tin |
SOC | System on a Chip |
SPC | Statistical Process Control |
TAB | Tape Automated Bonding |
Tape on Reel | A high volume automated shipping method for automated assemble processing available on 7" or 13" reels. |
Tg | Glass transition temperature |
Total Dose Radiation (RHA) | The total accumulated amount of ionizing radiation at a specified exposure rate that can be experienced by a microcircuit before its performance degradates below set limits. Typically measured per MIL-STD- 883, Method 1019 |
UBM | Under Bump Metallurgy |
UV | Ultraviolet |
Waffle Packs | Plastic trays with individualized pockets designed for a specific die size. |
Wire Bond | Die assembly method in which die is bonded upright to substrate and electrical connections are made with gold or aluminium wire between the bond pads and traces on the substrate. |
WLA | Wafer Lot Acceptance - certification that a wafer has passed a series of physical measurements including step coverage, SEM, surrent density and other measurement of critical dimensions. |
WL-CSP | Wafer-Level Chip Scale Package |
WLP | Wafer-Level Packaging |